1. Field of the Invention
The present invention relates generally to semiconductor integrated circuit (IC) technology and, more particularly, to a self-aligned bipolar semiconductor device and a fabrication method thereof.
2. Description of the Related Art
In comparison with typical MOS (metal oxide semiconductor) devices, BJT (bipolar junction transistor) devices have some advantages of relatively better current performance and higher operating speed. Hence the use of BJT devices is on an increasing trend in various branches of semiconductor IC technologies.
Additionally, HBT (heterojunction bipolar transistor) devices are superior in high speed and high frequency properties to conventional BJT devices as well as MESFET (metal semiconductor field effect transistor). In HBT devices, a band gap difference between a base and an emitter restrains the movement of holes from the base to the emitter, thus improving emitter injection efficiency and current gain.
Silicon germanium (SiGe) HBT devices, recently used for high frequency transistors, have a SiGe base with lower band gap rather than typical a Si base. SiGe HBT devices are therefore improved in current gain and operating speed. Furthermore, in SiGe HBT devices, current gain is not reduced and base resistance is decreased even if impurity concentration is increased. So SiGe HBT devices have favorably reduced figure of noise and low power consumption due to low operating voltage.
One of the important points to be considered in fabrication of BJT or HBT devices is to correct mask misalignment and thereby to shorten a distance between the base and the emitter. This is required not only to remove parasitic resistance and parasitic capacitance, but also to increase maximum oscillation frequency (fmax) and cut-off frequency (fT).
Generally, semiconductor fabrication in a self-aligned manner allows simplification of processes, reductions in production cost and time, and scaling down of devices. For example, fabrication of self-aligned bipolar transistors does not need some mask processes traditionally used. This may not only solve problems due to mask misalignment, but also reduce device size. So this may shorten a distance between adjacent devices and also improve device performance.
Several self-aligning techniques for semiconductor fabrication have been therefore widely studied in this art. Two examples are to selectively grow an epitaxial layer and to employ a difference of etch rate.
The selective growth of the epitaxial layer is, however, susceptible to quality and shape of a fundamental substrate. Furthermore, since the epitaxial layer grows isotropically, the growth of the epitaxial layer may invite electrical short-circuit between adjacent devices.
On the other hand, a technique using a difference of etch rate needs selective oxidation for offering such etch rate differences. This may unfavorably induce complex processes, a reduction in active regions due to bird's beak, variation of impurity concentration due to lengthy thermal process, an increase in leakage current due to stress occurring in selective oxidation.